英文:
Can the compiler coalesce atomic stores?
问题
以下是翻译好的内容：
GCC、MSVC和clang都会生成两个像这样的mov指令：
store2():
mov BYTE PTR b[rip], 1
mov BYTE PTR b[rip], 1
ret
b:
.zero 1
请注意：这些翻译可能并不准确，因为代码中包含特定的技术术语和代码片段。如果需要更准确的翻译，请提供更多上下文或详细信息。
英文:
The following code:
#include <atomic>
std::atomic_bool b;
void store2() {
b.store(true, std::memory_order::relaxed);
b.store(true, std::memory_order::relaxed);
}
GCC, MSVC, and clang all emit two movs like this:
store2():
mov BYTE PTR b[rip], 1
mov BYTE PTR b[rip], 1
ret
b:
.zero 1
See live demo
Would it be allowed to coalesce these atomic stores into a single mov? I don't believe it would violate the restrictions of std::memory_order::relaxed if other threads observed both atomic stores simultaneously, as if it was just one.
If it is allowed, why don't compilers perform this simple optimization?
答案1
得分: 3
是的，这将是一个有效的转换。编译器确实会优化一些原子操作，但要修改编译器以执行这种优化并不是一个轻松的任务，因为正确实现它们的基本策略包括在内联后禁用可能适用于它们的优化。
英文:
Yes, this would be a valid transformation. Compilers do optimize some atomic operations, but it’s not trivial to modify a compiler to perform such optimizations because the basic strategy for implementing them correctly consists of disabling optimizations that might otherwise apply to them after inlining.
通过集体智慧和协作来改善编程学习和解决问题的方式。致力于成为全球开发者共同参与的知识库，让每个人都能够通过互相帮助和分享经验来进步。
评论