英文:
MIPS procesor datapath for sub instruction
问题
The value for the signal D, in this case, would indeed be address + 4, which is 0x40000124.
As for signal A, it would be the value stored in register $s1, which is 0x1.
英文:
Consider this data path for a single-cycle 32-bit MIPS processor. Suppose the register of the processor have the following values $t2 = 0x12, $t3 = 0x82, $s1 = 0x1. Furthermore suppose that the processor is executing the instruction sub $s1,$t2, $t3 Datapath for mipswhich is located at address 0x40000120. What would the value for the signal D( shown in the figure) be?
I have understood that you get the value as address + 4 + ( 2<< imm) However we do not have a imm value here. Is the D signal then just address + 4 ( 0x40000124)?
Also would the signal A be 0x1?
答案1
得分: 1
我明白你说的是获取值的方式是 address + 4 + (imm<<2),但是这里没有 imm 值。那么 D 信号是否只是 address + 4(0x40000124)?
不,硬件确实计算了你所述的公式(使用的是 signextend16to32(imm)<<2
而不是 2<<imm
)— 就好像这个指令确实具有立即数一样。要找到 D
的值,你需要将减法指令解码为使用 I-Type 格式,也就是说使用该减法指令的较低的 16 位。
当然,因为这不是一个 I-Type 指令,所以“分支”控制信号将告诉 PC 接受 PC+4,而不是计算出的 D
数据通路的其他公式。
实际上,这里有足够的硬件来执行任何指令,换句话说,硬件具有执行每个可能指令所需的所有组件的联合。因此,可能会发生一些稍后被忽略的计算,因为这些硬件和计算只是简单地不适用于每个指令。
告诉硬件忽略一些不适当的计算比不执行这些计算更容易。 (而且速度更快,因为在我们知道是否需要它们之前,许多计算已经发生了。即使在执行分支指令时,该硬件也在运行并消耗一些功率,尽管其结果仅在取分支指令时使用。)
这就是“多路复用器”(mux)和控制信号的目的,控制信号告诉“mux”哪些数据对于这个特定指令是相关的(因此也告诉它忽略什么)。
一个“mux”相当于 C 语言中的 ?:
运算符或条件语句,比如:
datapath = x ? PC+4 : PC+4+(imm<<2)
或者
datapath = if x then PC+4 else PC+4+(imm<<2)
或者
if x then
datapath = PC+4
else
datapath = PC+4+(imm<<2)
主要的区别是,在 C 等语言中,只有 ?:
或 then/else 中的一侧会执行,而在硬件中,两侧都会执行,尽管只有一侧被选择/有用。
有关不同语言中运算符执行的更多信息,请参阅Eager vs. Short-Circuit。
英文:
> I have understood that you get the value as address + 4 + (imm<<2) However we do not have a imm value here. Is the D signal then just address + 4 ( 0x40000124)?
No, the hardware computes exactly the formula you stated (well using signextend16to32(imm)<<2
not 2<<imm
) — as if this instruction did indeed have an immediate. To find the value for D
, you need to decode the subtraction instruction as if using the I-Type format, which is to say the lower 16 bits of that subtraction instruction.
Of course, because this is not an I-Type instruction, the control signal for Branch
will tell the pc to accept PC+4 not the other formula calculated for the D
datapath.
In effect, there's enough hardware there to execute any instruction, put another way, the hardware has the union of all components needed to execute every possible instruction. It is common then, for some calculations to happen that are later ignored, since that hardware and calculation made simply they don't apply to every instruction.
It is easier to tell the hardware to ignore some inappropriate calculation, than to simply not do the calculation. (It is also faster, in that many calculations happen before we know whether or not they're needed. That hardware is there, it runs and costs some power even though its result is only used on taken branch instructions.)
This is the purpose of mux
es and control signals that tell the mux
what data is relevant to this particular instruction (and hence also what to ignore).
A mux
is equivalent to the ?:
operator in C or an if-then-else such as
datapath = x ? PC+4 : PC+4+(imm<<2)
or
datapath = if x then PC+4 else PC+4+(imm<<2)
or
if x then
datapath = PC+4
else
datapath = PC+4+(imm<<2)
The primary difference being that in C, say, only one side of the ?: or the then/else will execute, whereas in hardware, both sides execute, even though only one is chosen/useful.
For more info on operator execution in various languages, see Eager vs. Short-Circuit
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