英文:
Function calling in C++: Syntax help needed
问题
请查看以下的Verilog代码：
module first(input a, input b, output c)
assign c = a & b;
endmodule
然后我们将这个模块调用到另一个模块中，如下所示：
module second(input d, input e, output f)
first instance_name (.a(d), .b(e), .c(f));
endmodule
正如我们可以清楚地看到，哪个端口连接到了哪个端口。在C++中调用函数时，总是存在忽略某个端口并放置一些不需要的变量的风险。
在C++中是否有类似的做法？
英文:
Have a look at the Verilog code below:
module first(input a, input b, output c)
assign c= a&b;
endmodule
And then we call this module into another module like as below
module second(input d, input e, output f)
first instance_name (.a(d), .b(e), .c(f));
endmodule
As we can clearly see that which port is connected with which port. While calling a function in C++, its always a danger that we will miss a port and place some unwanted variable there.
Is there any similar way of doing things in C++?
答案1
得分: 3
虽然C++不直接支持命名参数的用法，但可以借助指定初始化器来实现：
struct t_Input
{
t_Input(void) = delete;
t_Input(int) {}
};
struct t_Args
{
t_Input a;
t_Input b;
t_Input c;
};
void First(t_Args args);
void Second()
{
// First({.a{1}, .c{3}}); // 错误
First({.a{1}, .b{2}, .c{3}});
}
此外，现代IDE（如Visual Studio）还提供了方便的内联提示功能。
英文:
While C++ does not support named argument idiom out of box, it can be done with help of designated initializers:
struct t_Input
{
t_Input(void) = delete;
t_Input(int) {}
};
struct t_Args
{
t_Input a;
t_Input b;
t_Input c;
};
void First(t_Args args);
void Second()
{
//First({.a{1}, .c{3}}); // error
First({.a{1}, .b{2}, .c{3}});
}
Also modern IDEs, such as Visual Studio, offer handy inline hints feature:
答案2
得分: 1
你正在提到在调用C++函数时给参数命名。不，这是不可能的。
一个好的集成开发环境（IDE）仍然会为您标记参数。
英文:
You are referring to naming the arguments in a C++ function when calling it. No, this is not possible.
A good IDE will nevertheless label your arguments for you.
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