Why the risc-v instruction "addi sp,sp,-32" is converted to binary code "11 01"?

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英文:

Why the risc-v instruction "addi sp,sp,-32" is converted to binary code "11 01"?

问题

"addi sp,sp,-40" 转换成二进制代码为 "fd810113"。

"addi sp,sp,-32" 转换成二进制代码为 "1101"。

英文:

I'm learning risc-v instruction set. I know that "addi sp,sp,-40" will be converted to "fd810113". But I don't know why "addi sp,sp,-32" is converted to binary code "11 01".

Why the risc-v instruction "addi sp,sp,-32" is converted to binary code "11 01"?

答案1

得分: 3

这是使用压缩指令格式的部分:

C.ADDI[2:0] nzimm[5] dest[4:0] nzimm[4:0] C1[1:0]

C.ADDI000SP为寄存器#2,C101时,得到:

000 1 00010 00000 01 = 0001 0001 0000 0001 = 0x1101

请注意,由于只有6位空间,压缩指令只接受来自-32到+31的立即数,这就是为什么另一条立即数为-40的指令使用32位格式的原因。

英文:

That is using the compressed instruction format:

C.ADDI[2:0] nzimm[5] dest[4:0] nzimm[4:0] C1[1:0]

With C.ADDI being 000, SP being register #2 and C1 being 01 it gives:

000 1 00010 00000 01 = 0001 0001 0000 0001 = 0x1101

Note that the compressed instruction only takes immediate from -32 to +31 due to having 6 bits of space which is why the other instruction with -40 is using the 32 bit format.

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  • 本文由 发表于 2023年4月17日 21:46:32
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