英文:
Why doesn't my Makefile interpolate an expression in a command
问题
我正在尝试编写一个非常简单的Makefile
来运行一个Go项目中的测试。该项目的依赖已经被vendored,但我想跳过这些测试。当我从命令行运行时,我只需执行以下命令:
$ go test $(go list ./... | grep -v /vendor/)
然而,当我将其放入一个像这样的Makefile
中时:
test:
go test $(go list ./... | grep -v /vendor/)
.PHONY: test
表达式将不会被评估:
$ make
go test
? github.com/m90/some-repo [no test files]
如何让make以类似shell的方式插入表达式?
英文:
I'm trying to write a super simple Makefile
to run the tests in a Go project. The project's dependencies are vendored, but I want to skip these tests. When running this from the command line I simply do
$ go test $(go list ./... | grep -v /vendor/)
Yet, when I put this into a Makefile
like this:
test:
go test $(go list ./... | grep -v /vendor/)
.PHONY: test
the expression will not be evaluated:
$ make
go test
? github.com/m90/some-repo [no test files]
How do I get make to interpolate the expression in a shell-like manner?
答案1
得分: 13
在Makefile的配方部分,你需要使用第二个$
来转义$
符号:
test:
go test $$(go list ./... | grep -v /vendor/)
.PHONY: test
英文:
In a Makefile recipe section you will need to escape the $
using a second $
:
test:
go test $$(go list ./... | grep -v /vendor/)
.PHONY: test
答案2
得分: 6
根据情况,使用shell函数在扩展配方期间评估命令可能更有用:
test:
go test $(shell go list ./... | grep -v /vendor/)
.PHONY: test
这将使包名成为配方的一部分,并在执行时通常打印子命令的结果。
英文:
Depending on the circumstance, it might be more useful to evaluate the command during the expansion of the recipe using shell function:
test:
go test $(shell go list ./... | grep -v /vendor/)
.PHONY: test
This will make the package names part of the recipe, and will normally print the result of the subcommand when executed.
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